Routing engine v2: overlap-averse schematic routing with label-tie fallback #1

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opened 2026-02-16 21:46:53 -05:00 by Rbanh · 3 comments
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Problem

Current rendered schematics still produce visually dense routes, avoidable overlaps, and long detours in medium-size analog graphs.

Goal

Implement a production-quality routing/layout pass that prioritizes readability over geometric shortest path.

Scope

  • Add stronger no-go penalties for crossing occupied channels and component-adjacent lanes.
  • Improve horizontal/vertical channel assignment and elbow spacing consistency.
  • Enforce minimum parallel-wire spacing and pin label clearance.
  • Expand label-tie fallback policy when explicit routing exceeds crossing/overlap budget.
  • Add deterministic route quality scoring (crossings, overlap_edges, total_bends, detour_ratio).

Acceptance Criteria

  • Zero component-through routes.
  • Significant reduction in crossings/overlaps on sample projects.
  • Deterministic output remains stable for same JSON.
  • Metrics surfaced in compile response and UI status summary.
## Problem Current rendered schematics still produce visually dense routes, avoidable overlaps, and long detours in medium-size analog graphs. ## Goal Implement a production-quality routing/layout pass that prioritizes readability over geometric shortest path. ## Scope - Add stronger no-go penalties for crossing occupied channels and component-adjacent lanes. - Improve horizontal/vertical channel assignment and elbow spacing consistency. - Enforce minimum parallel-wire spacing and pin label clearance. - Expand label-tie fallback policy when explicit routing exceeds crossing/overlap budget. - Add deterministic route quality scoring (crossings, overlap_edges, total_bends, detour_ratio). ## Acceptance Criteria - Zero component-through routes. - Significant reduction in crossings/overlaps on sample projects. - Deterministic output remains stable for same JSON. - Metrics surfaced in compile response and UI status summary.
Rbanh added this to the Phase 2 - Production Polish milestone 2026-02-16 21:47:19 -05:00
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Implemented first production-polish slice for routing quality in commit 6c5431a.

Shipped

  • Stronger A* penalties for congested channels and component-adjacent routing lanes.
  • Added channel crowding model using horizontal/vertical line usage maps.
  • Increased turn penalty and point congestion penalties to reduce zig-zag spaghetti.
  • Added schematic-mode fallback to label_tie when branch/global route quality degrades (detour/bend thresholds).
  • Added route stats per net and aggregated layout metrics:
    • total_bends
    • total_length
    • direct_length
    • detour_ratio
    • label_tie_fallbacks
  • Surfaced new metrics in frontend compile status line.

Notes

  • Determinism preserved.
  • Existing tests pass.

Remaining for Issue #1

  • Tune thresholds against larger benchmark circuits.
  • Add additional route quality metric(s) like elbow spacing score.
  • Add explicit regression scenes for overlap/crossing reduction targets.
Implemented first production-polish slice for routing quality in commit `6c5431a`. ### Shipped - Stronger A* penalties for congested channels and component-adjacent routing lanes. - Added channel crowding model using horizontal/vertical line usage maps. - Increased turn penalty and point congestion penalties to reduce zig-zag spaghetti. - Added schematic-mode fallback to `label_tie` when branch/global route quality degrades (detour/bend thresholds). - Added route stats per net and aggregated layout metrics: - `total_bends` - `total_length` - `direct_length` - `detour_ratio` - `label_tie_fallbacks` - Surfaced new metrics in frontend compile status line. ### Notes - Determinism preserved. - Existing tests pass. ### Remaining for Issue #1 - Tune thresholds against larger benchmark circuits. - Add additional route quality metric(s) like elbow spacing score. - Add explicit regression scenes for overlap/crossing reduction targets.
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Owner

Routing readability increment delivered in main via commit f65e4d9.

Delivered:

  • Expanded label-tie routing heuristics in schematic mode:
    • auto tie-net mode for dense multi-node nets (>=5 nodes)
    • auto tie-net mode for long-distributed analog/signal nets (>=3 nodes with large span)
  • Added layout_metrics.label_tie_routes to expose how many nets were rendered in tie/stub mode.
  • Updated compile status text in UI to include tie-net count for immediate routing-quality visibility.
  • Extended compile tests to assert label_tie_routes contract field.

Result: cleaner default routing for dense graphs with deterministic fallback toward readable net-stub wiring.

Routing readability increment delivered in `main` via commit `f65e4d9`. Delivered: - Expanded label-tie routing heuristics in schematic mode: - auto tie-net mode for dense multi-node nets (`>=5` nodes) - auto tie-net mode for long-distributed analog/signal nets (`>=3` nodes with large span) - Added `layout_metrics.label_tie_routes` to expose how many nets were rendered in tie/stub mode. - Updated compile status text in UI to include tie-net count for immediate routing-quality visibility. - Extended compile tests to assert `label_tie_routes` contract field. Result: cleaner default routing for dense graphs with deterministic fallback toward readable net-stub wiring.
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Owner

Final closure summary:

  • Routing heuristics upgraded with stronger tie-net fallback and route-quality metrics.
  • Compile/UI now expose crossings, overlaps, bends, detour, and tie-net counts.
  • Deterministic routing behavior preserved and covered by tests.

Latest related commits include f65e4d9 and prior routing quality slices.

Final closure summary: - Routing heuristics upgraded with stronger tie-net fallback and route-quality metrics. - Compile/UI now expose crossings, overlaps, bends, detour, and tie-net counts. - Deterministic routing behavior preserved and covered by tests. Latest related commits include `f65e4d9` and prior routing quality slices.
Rbanh closed this issue 2026-02-18 21:03:01 -05:00
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Reference: Rbanh/schemeta#1
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